Documentation/Platforms/TriCore: Difference between revisions

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== Introduction ==
== Introduction ==
TriCore is a unified, 32-bit microcontroller-DSP architecture optimized for real-time embedded systems. It mostly targets gasoline and diesel engine control units (ECUs), applications in hybrid and electric vehicles as well as transmission, active and passive safety and chassis applications. The instruction set architecture (ISA) consists of three types of instruction sets: one microcontroller, one RISCV load-store, and one DSP instruction set -- thus the name TriCore.
TriCore is a unified, 32-bit microcontroller-DSP architecture optimized for real-time embedded systems. It mostly targets gasoline and diesel engine control units (ECUs), applications in hybrid and electric vehicles as well as transmission, active and passive safety and chassis applications. The instruction set architecture (ISA) consists of three types of instruction sets: one microcontroller, one RISC load-store, and one DSP instruction set -- thus the name TriCore.
== Status ==
== Status ==


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Please note that there is no real existing TriCore board implemented so far. The suggested testboard only instantiates memory and a CPU, and thus no I/O is possible.  
Please note that there is no real existing TriCore board implemented so far. The suggested testboard only instantiates memory and a CPU, and thus no I/O is possible.  
== Attaching gdb ==
If you use gcc to build your guest binary, make sure you build using the old debug symbols. The flags for gcc are
  -gdwarf-2 -gstrict-dwarf
Now you can start QEMU
  qemu-system-tricore -M tricore_testboard -kernel /path/to/your/binary -s -S
QEMU will halt until you attach with the tricore-gdb
  (gdb) target remote localhost:1234


== Contacts ==
== Contacts ==
Maintainer: Bastian Koppelmann [mailto:kbastian@mail.upb.de kbastian@mail.upb.de]
Maintainer: Bastian Koppelmann [mailto:kbastian@mail.upb.de kbastian@mail.upb.de]

Latest revision as of 08:43, 2 June 2020

Introduction

TriCore is a unified, 32-bit microcontroller-DSP architecture optimized for real-time embedded systems. It mostly targets gasoline and diesel engine control units (ECUs), applications in hybrid and electric vehicles as well as transmission, active and passive safety and chassis applications. The instruction set architecture (ISA) consists of three types of instruction sets: one microcontroller, one RISC load-store, and one DSP instruction set -- thus the name TriCore.

Status

ISA

ISA version CPU FPU MMU
1.3 Complete missing few instructions not implemented
1.3.1 Complete missing few instructions not implemented
1.6 Complete missing few instructions not implemented
1.6.1 Complete missing few instructions not implemented

Machine

Machine Status
tricore_testboard Complete, no real board
TC275 in development


Peripherals

Peripherals Status
Watchdog in development
SCU in development

Build Directions

 ./configure --target-list=tricore-softmmu && make

Running a binary

 qemu-system-tricore -M tricore_testboard -kernel /path/to/your/binary 

Please note that there is no real existing TriCore board implemented so far. The suggested testboard only instantiates memory and a CPU, and thus no I/O is possible.

Attaching gdb

If you use gcc to build your guest binary, make sure you build using the old debug symbols. The flags for gcc are

 -gdwarf-2 -gstrict-dwarf

Now you can start QEMU

 qemu-system-tricore -M tricore_testboard -kernel /path/to/your/binary -s -S

QEMU will halt until you attach with the tricore-gdb

 (gdb) target remote localhost:1234

Contacts

Maintainer: Bastian Koppelmann kbastian@mail.upb.de