Internships/ProjectIdeas/MultiplePCIDomainsForQ35: Difference between revisions
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This is a serious limitation since all of them have to share a range | This is a serious limitation since all of them have to share a range | ||
of 256 PCI buses, which leads to a hard limit on the number of PCI | of 256 PCI buses, which leads to a hard limit on the number of PCI | ||
devices the Q35 machine can use. | |||
The limitation comes from the fact the PCI Express topology limits | The limitation comes from the fact the PCI Express topology limits | ||
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* http://qemu-project.org/Features/Q35 | * http://qemu-project.org/Features/Q35 | ||
* http://wiki.qemu-project.org/images/4/4e/Q35.pdf | * http://wiki.qemu-project.org/images/4/4e/Q35.pdf | ||
* https://git.qemu.org/?p=qemu.git;a=blob_plain;f=docs/pcie_pci_bridge.txt | |||
* http://git.qemu.org/?p=qemu.git;a=blob_plain;f=hw/pci-bridge/pci_expander_bridge.c | * http://git.qemu.org/?p=qemu.git;a=blob_plain;f=hw/pci-bridge/pci_expander_bridge.c | ||
* http://wiki.qemu-project.org/images/f/f6/PCIvsPCIe.pdf | * http://wiki.qemu-project.org/images/f/f6/PCIvsPCIe.pdf | ||
Latest revision as of 12:52, 19 February 2018
Multiple PCI domains for x86 PCI Express Machine (Q35)
Summary: Implement multiple PCI domains support for x86 machines.
Currently QEMU supports multiple PCIe Host Bridges in Q35 PCI Express chipset using the pxb-pcie device.
However all PCIe Host Bridges are part of the same PCI domain (0). This is a serious limitation since all of them have to share a range of 256 PCI buses, which leads to a hard limit on the number of PCI devices the Q35 machine can use.
The limitation comes from the fact the PCI Express topology limits one PCI Express device per PCI bus.
PCI devices have a set of registers referred to as ‘Configuration Space’ and PCI Express introduces Extended Configuration Space mechanism for devices (ECAM). Basically, the 'Configuration Space' registers are mapped to a memory location which can be accessed by software in order to setup the PCI devices.
Each PCI domain requires a different (ECAM) space, however QEMU implements only one.
The goal of this summer project is to improve Q35's PCIe Host bridges (pxb-pcie) in order to place them on their own PCI domain in order to remove the mentioned limitation.
Links:
- http://qemu-project.org/Features/Q35
- http://wiki.qemu-project.org/images/4/4e/Q35.pdf
- https://git.qemu.org/?p=qemu.git;a=blob_plain;f=docs/pcie_pci_bridge.txt
- http://git.qemu.org/?p=qemu.git;a=blob_plain;f=hw/pci-bridge/pci_expander_bridge.c
- http://wiki.qemu-project.org/images/f/f6/PCIvsPCIe.pdf
Details:
- Skill level: intermediate
- Language: C
- Mentor: marcel@redhat.com, marcel_a on IRC
- Suggested by: Marcel Apfelbaum <marcel@redhat.com>