Features/QOM/CPU: Difference between revisions

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m (Document historical dependency of alpha series on unicore32)
(Added R-Mobile A1 to list of mixed-architecture SoCs)
 
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#* ARM big.LITTLE: Cortex-A15 + Cortex-A7
#* ARM big.LITTLE: Cortex-A15 + Cortex-A7
#* Freescale Vybrid VF6xx/VF7xx: Cortex-A5 + Cortex-M4
#* Freescale Vybrid VF6xx/VF7xx: Cortex-A5 + Cortex-M4
#* TI OMAP5: Cortex-A15 + Cortex-M4
# Long-term: Work towards allowing to compile multiple targets into one executable.
# Long-term: Work towards allowing to compile multiple targets into one executable.
#* Renesas R-Car H1, M1A: ARM Cortex-A9 + SH-4A
#* Renesas R-Car H1, M1A: ARM Cortex-A9 + SH-4A
#* Renesas R-Home S1: ARM Cortex-A9 + SH-4A + ARM7TDMI-S
#* Renesas R-Home S1: ARM Cortex-A9 + SH-4A + ARM7TDMI-S
#* Renesas R-Mobile A1: ARM Cortex-A9 + SH4A


=== "CPU" name conflict ===
=== "CPU" name conflict ===
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== Status ==
== Status ==


QOM CPUState exists, former CPUState is renamed to CPUArchState.
QOM CPUState exists, former CPUState is renamed to CPUArchState. All targets have been converted for v1.1-rc0.


Individual targets have been converted, some are pending review, other conversions are being simplified.
Initial field movements from CPUArchState to CPUState and subsequent signature adaptations are on the list.


Field movements from CPUArchState to CPUState (and subsequent removal of CPUArchState and CPU_COMMON) are waiting on completion of conversion of all targets.
TLB redesign is still open - suggestions welcome.


=== Patch series and branches ===
=== Patch series and branches ===
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|-
|-
|<del>qom-user</del>
|<del>qom-user</del>
|type_init()
|<del>type_init()</del>
|-
|-
|<del>object_class_get_list()</del>
|<del>object_class_get_list()</del>
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|-
|-
|<del>qom-cpu</del>
|<del>qom-cpu</del>
|qom-user
|<del>qom-user</del>
|-
|-
|<del>[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-arm qom-cpu-arm]</del>
|<del>[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-arm qom-cpu-arm]</del>
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|<del>qom-cpu</del>
|<del>qom-cpu</del>
|-
|-
|[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-x86 qom-cpu-x86], part 1
|<del>[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-x86 qom-cpu-x86], part 1</del>
|<del>qom-cpu</del>
|<del>qom-cpu</del>
|-
|-
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|<del>qom-cpu, qom-cpu-s390</del>
|<del>qom-cpu, qom-cpu-s390</del>
|-
|-
|[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-ppc qom-cpu-ppc]
|<del>[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-ppc qom-cpu-ppc]</del>
|<del>qom-cpu</del>
|<del>qom-cpu</del>
|-
|-
|[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-alpha qom-cpu-alpha]
|<del>[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-alpha qom-cpu-alpha]</del>
|<del>qom-cpu, qom-cpu-unicore32</del>
|<del>qom-cpu, qom-cpu-unicore32</del>
|-
|-
|[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-lm32 qom-cpu-lm32]
|<del>[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-lm32 qom-cpu-lm32]</del>
|<del>qom-cpu</del>
|<del>qom-cpu, qom-cpu-arm, qom-cpu-s390</del>
|-
|<del>[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-xtensa qom-cpu-xtensa]</del>
|<del>qom-cpu, qom-cpu-unicore32</del>, qom-cpu-alpha
|-
|<del>[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-cris qom-cpu-cris]</del>
|<del>qom-cpu, qom-cpu-arm, qom-cpu-s390, qom-cpu-lm32</del>
|-
|<del>[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-microblaze qom-cpu-microblaze]</del>
|<del>qom-cpu, qom-cpu-arm, qom-cpu-s390, qom-cpu-lm32</del>, qom-cpu-cris
|-
|<del>[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-sh4 qom-cpu-sh4], part 1</del>
|<del>qom-cpu, qom-cpu-s390, qom-cpu-sparc, qom-cpu-lm32, qom-cpu-microblaze</del>
|-
|<del>[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-m68k qom-cpu-m68k]</del>
|<del>qom-cpu, object_class_get_list(), qom-cpu-arm, qom-cpu-s390, qom-cpu-lm32, qom-cpu-cris, qom-cpu-microblaze, qom-cpu-sh4</del>
|-
|<del>[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-mips qom-cpu-mips]</del>
|<del>qom-cpu, qom-cpu-s390, qom-cpu-lm32, qom-cpu-microblaze, qom-cpu-sh4, qom-cpu-m68k</del>
|-
|<del>[https://github.com/afaerber/qemu-cpu/commits/qom-cpu qom-cpu], part 2 (cleanup)</del>
|<del>qom-cpu-arm, qom-cpu-unicore32, qom-cpu-s390, qom-cpu-x86, qom-cpu-sparc, qom-cpu-ppc, qom-cpu-alpha, qom-cpu-lm32, qom-cpu-xtensa, qom-cpu-cris, qom-cpu-microblaze, qom-cpu-sh4, qom-cpu-m68k, qom-cpu-mips</del>
|-
|<del>[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-x86 qom-cpu-x86], part 2 (props)</del>
|
|-
|'''[http://repo.or.cz/w/qemu/afaerber.git/shortlog/refs/heads/qom-1.1 qom-1.1]'''
|
|-
|[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-1.1 qom-cpu-1.1] (cleanups)
|
|-
|'''[http://repo.or.cz/w/qemu/afaerber.git/shortlog/refs/heads/qom-next qom-next]'''
|
|-
|<del>[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-reset qom-cpu], part 3 (reset)</del>
|<del>qom-cpu-1.1</del>
|-
|[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-x86 qom-cpu-x86], part 3 (classes)
|
|-
|[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-sh4 qom-cpu-sh4], part 2
|
|-
|[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-unicore32 qom-cpu-unicore32], part 2
|
|-
|[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-alpha qom-cpu-alpha], part 2
|
|-
|<del>[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-arm qom-cpu-arm], part 2 (followups to qom-cpu part 3 and cherry-picks from part 4)</del>
|<del>qom-cpu-reset</del>
|-
|-
|[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-sh4 qom-cpu-sh4] (to be updated)
|[https://github.com/afaerber/qemu-cpu/commits/qom-cpu qom-cpu], part 4 (common)
|<del>qom-cpu</del>, object_realize()
|qom-next
|-
|-
|[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-others qom-cpu-others] (to be split up)
|[https://github.com/afaerber/qemu-cpu/commits/qom-cpu-dev qom-cpu], part 5 (device)
|<del>qom-cpu</del>
|qom-next
|}
|}

Latest revision as of 23:14, 14 June 2012

Summary

Convert CPUState to QOM.

Motivation

  1. Short-term: Allow inspecting and modifying CPU properties via QOM.
  2. Short-term: Avoid common target code doing ifs or switches on CPU identifiers.
    • target-arm/helper.c: cpu_reset_model_id()
  3. Short-term: Replace CPU_COMMON macro and duplicated reset code by inheritance.
  4. Mid-term: Avoid dependency of common code on #defines from cpu.h.
  5. Mid-term: Ease instantiation of mixed software-visible cores within one target, e.g.
    • NXP LPC43xx: Cortex-M4 + Cortex-M0
    • ARM big.LITTLE: Cortex-A15 + Cortex-A7
    • Freescale Vybrid VF6xx/VF7xx: Cortex-A5 + Cortex-M4
    • TI OMAP5: Cortex-A15 + Cortex-M4
  6. Long-term: Work towards allowing to compile multiple targets into one executable.
    • Renesas R-Car H1, M1A: ARM Cortex-A9 + SH-4A
    • Renesas R-Home S1: ARM Cortex-A9 + SH-4A + ARM7TDMI-S
    • Renesas R-Mobile A1: ARM Cortex-A9 + SH4A

"CPU" name conflict

Identifier current interim final
struct CPU$archState or
struct CPUState_$arch 		defined in target-*/cpu.h ???
#define CPUState alias to CPU$archState / CPUState_$arch dropped in favor of CPU
struct CPUClass class
#define CPU_CLASS(class) cast macro for class
struct CPU object
#define CPU(obj) cast macro for object
#define CPU_GET_CLASS(obj) macro to obtain class pointer

Resolved by renaming existing CPUState to CPUArchState and by using struct CPUState for the object state, while using CPU(obj) as macro for casting.

Owner

  • Name: Andreas Färber
  • Email: afaerber@suse.de

Status

QOM CPUState exists, former CPUState is renamed to CPUArchState. All targets have been converted for v1.1-rc0.

Initial field movements from CPUArchState to CPUState and subsequent signature adaptations are on the list.

TLB redesign is still open - suggestions welcome.

Patch series and branches

NB: Due to hosting issues, branches have moved to GitHub.

name depends on
type_init()
qom-user type_init()
object_class_get_list()
qom-cpu qom-user
qom-cpu-arm qom-cpu
qom-cpu-unicore32 qom-cpu
qom-cpu-s390 qom-cpu
qom-cpu-x86, part 1 qom-cpu
qom-cpu-sparc qom-cpu, qom-cpu-s390
qom-cpu-ppc qom-cpu
qom-cpu-alpha qom-cpu, qom-cpu-unicore32
qom-cpu-lm32 qom-cpu, qom-cpu-arm, qom-cpu-s390
qom-cpu-xtensa qom-cpu, qom-cpu-unicore32, qom-cpu-alpha
qom-cpu-cris qom-cpu, qom-cpu-arm, qom-cpu-s390, qom-cpu-lm32
qom-cpu-microblaze qom-cpu, qom-cpu-arm, qom-cpu-s390, qom-cpu-lm32, qom-cpu-cris
qom-cpu-sh4, part 1 qom-cpu, qom-cpu-s390, qom-cpu-sparc, qom-cpu-lm32, qom-cpu-microblaze
qom-cpu-m68k qom-cpu, object_class_get_list(), qom-cpu-arm, qom-cpu-s390, qom-cpu-lm32, qom-cpu-cris, qom-cpu-microblaze, qom-cpu-sh4
qom-cpu-mips qom-cpu, qom-cpu-s390, qom-cpu-lm32, qom-cpu-microblaze, qom-cpu-sh4, qom-cpu-m68k
qom-cpu, part 2 (cleanup) qom-cpu-arm, qom-cpu-unicore32, qom-cpu-s390, qom-cpu-x86, qom-cpu-sparc, qom-cpu-ppc, qom-cpu-alpha, qom-cpu-lm32, qom-cpu-xtensa, qom-cpu-cris, qom-cpu-microblaze, qom-cpu-sh4, qom-cpu-m68k, qom-cpu-mips
qom-cpu-x86, part 2 (props)
qom-1.1
qom-cpu-1.1 (cleanups)
qom-next
qom-cpu, part 3 (reset) qom-cpu-1.1
qom-cpu-x86, part 3 (classes)
qom-cpu-sh4, part 2
qom-cpu-unicore32, part 2
qom-cpu-alpha, part 2
qom-cpu-arm, part 2 (followups to qom-cpu part 3 and cherry-picks from part 4) qom-cpu-reset
qom-cpu, part 4 (common) qom-next
qom-cpu, part 5 (device) qom-next
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