Features/ARM/SVE: Difference between revisions
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ARM's Scalable Vector Extensions are a novel extension to existing NEON and AdvSIMD extensions for providing vector processing. The novel part is the way the instruction set is structured allows for code generation without knowing what the implementation defined total vector length is. | ARM's Scalable Vector Extensions are a novel extension to existing NEON and AdvSIMD extensions for providing vector processing. The novel part is the way the instruction set is structured allows for code generation without knowing what the implementation defined total vector length is. | ||
==In Development == | |||
This feature is currently in development. | |||
== More Information == | == More Information == | ||
* https://community.arm.com/processors/b/blog/posts/technology-update-the-scalable-vector-extension-sve-for-the-armv8-a-architecture | * https://community.arm.com/processors/b/blog/posts/technology-update-the-scalable-vector-extension-sve-for-the-armv8-a-architecture | ||
Revision as of 15:49, 13 March 2018
ARM's Scalable Vector Extensions are a novel extension to existing NEON and AdvSIMD extensions for providing vector processing. The novel part is the way the instruction set is structured allows for code generation without knowing what the implementation defined total vector length is.
In Development
This feature is currently in development.