Documentation/Platforms/TriCore: Difference between revisions

Revision as of 12:59, 14 November 2016

Introduction

TriCore is a unified, 32-bit microcontroller-DSP architecture optimized for real-time embedded systems. It mostly targets gasoline and diesel engine control units (ECUs), applications in hybrid and electric vehicles as well as transmission, active and passive safety and chassis applications. The instruction set architecture (ISA) consists of three types of instruction sets: one microcontroller, one RISCV load-store, and one DSP instruction set -- thus the name TriCore.

Status

ISA

ISA version	CPU	FPU	MMU
1.3	Complete	missing few instructions	not implemented
1.3.1	Complete	missing few instructions	not implemented
1.6	Complete	missing few instructions	not implemented
1.6.1	Complete	missing few instructions	not implemented

Machine

Machine	Status
tricore_testboard	Complete, no real board
TC275	in development

Peripherals

Peripherals	Status
Watchdog	in development
SCU	in development

Running a binary

 qemu-system-tricore -M tricore_testboard -kernel /path/to/your/binary

Please note that there is no real existing TriCore board implemented so far. The suggested testboard only instantiates memory and a CPU, and thus no I/O is possible.

Contacts

Maintainer: Bastian Koppelmann kbastian@mail.upb.de

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+== Introduction ==
+TriCore is a unified, 32-bit microcontroller-DSP architecture optimized for real-time embedded systems. It mostly targets gasoline and diesel engine control units (ECUs), applications in hybrid and electric vehicles as well as transmission, active and passive safety and chassis applications. The instruction set architecture (ISA) consists of three types of instruction sets: one microcontroller, one RISCV load-store, and one DSP instruction set -- thus the name TriCore.
 == Status ==