Features/MicroBit: Difference between revisions
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|[PATCH v2 0/3] arm: add skeleton Cortex M0 CPU model | |[PATCH v2 0/3] arm: add skeleton Cortex M0 CPU model | ||
|[http://patchew.org/QEMU/20180630091343.14391-1-stefanha@redhat.com/ 20180630091343.14391-1-stefanha@redhat.com] | |[http://patchew.org/QEMU/20180630091343.14391-1-stefanha@redhat.com/ 20180630091343.14391-1-stefanha@redhat.com] | ||
| not merged | |||
|- | |||
|6/3/18 | |||
|[RFC v3] qapi: command category to stimulate high-level machine devices | |||
|[http://patchew.org/QEMU/20180603203412.11033-1-contrib@steffen-goertz.de/ 20180603203412.11033-1-contrib@steffen-goertz.de] | |||
| not merged | |||
|- | |||
|6/19/18 | |||
|[RFC] Add NRF51 RNG peripheral | |||
|[http://patchew.org/QEMU/20180619105451.29163-1-contrib@steffen-goertz.de/ 20180619105451.29163-1-contrib@steffen-goertz.de] | |||
| not merged | |||
|- | |||
|6/26/18 | |||
|[RFC] arm: Add NRF51 SOC non-volatile memory controller | |||
|[http://patchew.org/QEMU/20180626081743.22097-1-contrib@steffen-goertz.de/ 20180626081743.22097-1-contrib@steffen-goertz.de] | |||
| not merged | |||
|- | |||
|6/26/18 | |||
|[RFC v2] arm: Add NRF51 SOC non-volatile memory controller | |||
|[http://patchew.org/QEMU/20180626093204.27612-1-contrib@steffen-goertz.de/ 20180626093204.27612-1-contrib@steffen-goertz.de] | |||
| not merged | |||
|- | |||
|6/26/18 | |||
|[RFC v2] arm: Add NRF51 random number generator peripheral | |||
|[http://patchew.org/QEMU/20180626104943.2756-1-contrib@steffen-goertz.de/ 20180626104943.2756-1-contrib@steffen-goertz.de] | |||
| not merged | |||
|- | |||
|6/27/18 | |||
|[RFC 0/8] arm: Changes to Microbit Board and NRF51 SOC | |||
|[http://patchew.org/QEMU/20180627073351.856-1-contrib@steffen-goertz.de/ 20180627073351.856-1-contrib@steffen-goertz.de] | |||
| not merged | | not merged | ||
|} | |} |
Revision as of 09:02, 5 July 2018
The micro:bit is a small ARMv6-M board designed for learning about computers. It can be programmed in Python, Javascript, and C/C++.
Julia Suvorova and Steffen Görtz are implementing micro:bit support in QEMU as part of the Outreachy and Google Summer of Code internship program.
Details
- Project branch: https://github.com/stefanha/qemu/tree/microbit
Patches
Patchwork Bundle http://patchwork.ozlabs.org/bundle/steffengoertz/Microbit/
Date | Name | Message ID | Status |
---|---|---|---|
5/3/18 | [PATCH 0/2] arm: Add nRF51 SoC and micro:bit machine | 20180503090532.3113-1-joel@jms.id.au | Not merged |
6/27/18 | [PATCH 0/2] arm: Add nRF51 SoC and micro:bit machine | 20180627143815.1829-1-joel@jms.id.au | Not merged |
5/29/18 | [RFC 0/3] nRF51 SoC: Add UART support | 20180529220338.10879-1-jusual@mail.ru | Not merged |
6/12/18 | [PATCH] target/arm: Allow ARMv6-M Thumb2 instructions | 20180612204632.28780-1-jusual@mail.ru | merged |
6/18/18 | [PATCH] target/arm: Minor cleanup for ARMv6-M 32-bit instructions | 20180618214604.6777-1-jusual@mail.ru | merged |
6/19/18 | [PATCH] target/arm: Set strict alignment for ARMv6-M load/store | 20180619204237.9931-1-jusual@mail.ru | not merged |
6/22/18 | [PATCH v2 0/2] Strict alignment for ARMv6-M and ARMv8-M Baseline | 20180622080138.17702-1-jusual@mail.ru | merged |
7/2/18 | [PATCH] qtest: Use cpu address space instead of system memory | 20180702065237.27899-1-jusual@mail.ru | queued |
7/4/18 | [PATCH 0/2] nvic: Handle ARMv6-M SCS reserved registers | 20180704195812.28798-1-jusual@mail.ru | not merged |
7/4/18 | [PATCH] target/arm: Forbid unprivileged mode for M Baseline | 20180704203639.29553-1-jusual@mail.ru | not merged |
6/2/18 | [RFC 0/2] arm: add skeleton Cortex M0 CPU model | 20180602141446.29982-1-stefanha@redhat.com | not merged |
6/10/18 | [RFC] target/arm: add ARMv6-M UNDEFINED 32-bit instruction test | 20180610153556.17107-1-stefanha@redhat.com | not merged |
6/14/18 | [RFC v2] target/arm: add ARMv6-M UNDEFINED 32-bit instruction test | 20180614081610.12092-1-stefanha@redhat.com | not merged |
6/30/18 | [PATCH v2 0/3] arm: add skeleton Cortex M0 CPU model | 20180630091343.14391-1-stefanha@redhat.com | not merged |
6/3/18 | [RFC v3] qapi: command category to stimulate high-level machine devices | 20180603203412.11033-1-contrib@steffen-goertz.de | not merged |
6/19/18 | [RFC] Add NRF51 RNG peripheral | 20180619105451.29163-1-contrib@steffen-goertz.de | not merged |
6/26/18 | [RFC] arm: Add NRF51 SOC non-volatile memory controller | 20180626081743.22097-1-contrib@steffen-goertz.de | not merged |
6/26/18 | [RFC v2] arm: Add NRF51 SOC non-volatile memory controller | 20180626093204.27612-1-contrib@steffen-goertz.de | not merged |
6/26/18 | [RFC v2] arm: Add NRF51 random number generator peripheral | 20180626104943.2756-1-contrib@steffen-goertz.de | not merged |
6/27/18 | [RFC 0/8] arm: Changes to Microbit Board and NRF51 SOC | 20180627073351.856-1-contrib@steffen-goertz.de | not merged |
Devices
nRF51 System-on-Chip
- Cortex M0 (ARMv6-M) CPU
- SysTick timer
- NVIC irq controller
- UART [Julia]
- Watchdog
- Clock controller [Julia]
- Timers
- RTC
- RNG [Steffen]
- TWI (i2c)
- SPI
- ADC
- Quadrature decoder
- Radio
- GPIO [Steffen]
- NVMC [Julia, Steffen]
Peripherals
- A & B Buttons [Steffen]
- 5x5 LEDs
- i2c Accelerometer/Magnetometer
User interface
- New WebSocket QMP monitor for UI commands
- Button commands
- LED update events
- HTML/Javascript frontend that connects to WebSocket UI monitor