Features/MicroBit: Difference between revisions

From QEMU
Line 14: Line 14:
! scope="col"| Name  
! scope="col"| Name  
! scope="col"| Message ID
! scope="col"| Message ID
! scope="col"| Status
|-
|-
|5/3/18
|5/3/18
|[PATCH 0/2] arm: Add nRF51 SoC and micro:bit machine
|[PATCH 0/2] arm: Add nRF51 SoC and micro:bit machine
| [http://patchew.org/QEMU/20180627143815.1829-1-joel@jms.id.au/ 20180503090532.3113-1-joel@jms.id.au]
| [http://patchew.org/QEMU/20180627143815.1829-1-joel@jms.id.au/ 20180503090532.3113-1-joel@jms.id.au]
| Not merged
|-
|-
|6/27/18
|6/27/18
|[PATCH 0/2] arm: Add nRF51 SoC and micro:bit machine
|[PATCH 0/2] arm: Add nRF51 SoC and micro:bit machine
| [http://patchew.org/QEMU/20180503090532.3113-1-joel@jms.id.au/ 20180627143815.1829-1-joel@jms.id.au]
| [http://patchew.org/QEMU/20180503090532.3113-1-joel@jms.id.au/ 20180627143815.1829-1-joel@jms.id.au]
| Not merged
|-
| 5/29/18
|[RFC 0/3] nRF51 SoC: Add UART support
|[http://patchew.org/QEMU/20180529220338.10879-1-jusual@mail.ru/ 20180529220338.10879-1-jusual@mail.ru]
| Not merged
|-
| 6/12/18
|[PATCH] target/arm: Allow ARMv6-M Thumb2 instructions
|[http://patchew.org/QEMU/20180612204632.28780-1-jusual@mail.ru/ 20180612204632.28780-1-jusual@mail.ru]
| merged
|-
|6/18/18
|[PATCH] target/arm: Minor cleanup for ARMv6-M 32-bit instructions
|[http://patchew.org/QEMU/20180618214604.6777-1-jusual@mail.ru/ 20180618214604.6777-1-jusual@mail.ru]
| merged
|-
|6/19/18
|[PATCH] target/arm: Set strict alignment for ARMv6-M load/store
|[http://patchew.org/QEMU/20180619204237.9931-1-jusual@mail.ru/ 20180619204237.9931-1-jusual@mail.ru]
| not merged
|-
|6/22/18
|[PATCH v2 0/2] Strict alignment for ARMv6-M and ARMv8-M Baseline
|[http://patchew.org/QEMU/20180622080138.17702-1-jusual@mail.ru/ 20180622080138.17702-1-jusual@mail.ru]
| merged
|-
|7/2/18
|[PATCH] qtest: Use cpu address space instead of system memory
|[http://patchew.org/QEMU/20180702065237.27899-1-jusual@mail.ru/ 20180702065237.27899-1-jusual@mail.ru]
| queued
|-
|7/4/18
|[PATCH 0/2] nvic: Handle ARMv6-M SCS reserved registers
|[http://patchew.org/QEMU/20180704195812.28798-1-jusual@mail.ru/ 20180704195812.28798-1-jusual@mail.ru]
| not merged
|-
|7/4/18
|[PATCH] target/arm: Forbid unprivileged mode for M Baseline
|[http://patchew.org/QEMU/20180704203639.29553-1-jusual@mail.ru/ 20180704203639.29553-1-jusual@mail.ru]
| not merged
|}
|}


Revision as of 08:51, 5 July 2018

The micro:bit is a small ARMv6-M board designed for learning about computers. It can be programmed in Python, Javascript, and C/C++.

Julia Suvorova and Steffen Görtz are implementing micro:bit support in QEMU as part of the Outreachy and Google Summer of Code internship program.

Details

Patches

Patchwork Bundle http://patchwork.ozlabs.org/bundle/steffengoertz/Microbit/

Date Name Message ID Status
5/3/18 [PATCH 0/2] arm: Add nRF51 SoC and micro:bit machine 20180503090532.3113-1-joel@jms.id.au Not merged
6/27/18 [PATCH 0/2] arm: Add nRF51 SoC and micro:bit machine 20180627143815.1829-1-joel@jms.id.au Not merged
5/29/18 [RFC 0/3] nRF51 SoC: Add UART support 20180529220338.10879-1-jusual@mail.ru Not merged
6/12/18 [PATCH] target/arm: Allow ARMv6-M Thumb2 instructions 20180612204632.28780-1-jusual@mail.ru merged
6/18/18 [PATCH] target/arm: Minor cleanup for ARMv6-M 32-bit instructions 20180618214604.6777-1-jusual@mail.ru merged
6/19/18 [PATCH] target/arm: Set strict alignment for ARMv6-M load/store 20180619204237.9931-1-jusual@mail.ru not merged
6/22/18 [PATCH v2 0/2] Strict alignment for ARMv6-M and ARMv8-M Baseline 20180622080138.17702-1-jusual@mail.ru merged
7/2/18 [PATCH] qtest: Use cpu address space instead of system memory 20180702065237.27899-1-jusual@mail.ru queued
7/4/18 [PATCH 0/2] nvic: Handle ARMv6-M SCS reserved registers 20180704195812.28798-1-jusual@mail.ru not merged
7/4/18 [PATCH] target/arm: Forbid unprivileged mode for M Baseline 20180704203639.29553-1-jusual@mail.ru not merged

Devices

nRF51 System-on-Chip

  • Cortex M0 (ARMv6-M) CPU
    • SysTick timer
    • NVIC irq controller
  • UART [Julia]
  • Watchdog
  • Clock controller [Julia]
  • Timers
  • RTC
  • RNG [Steffen]
  • TWI (i2c)
  • SPI
  • ADC
  • Quadrature decoder
  • Radio
  • GPIO [Steffen]
  • NVMC [Julia, Steffen]

Peripherals

  • A & B Buttons [Steffen]
  • 5x5 LEDs
  • i2c Accelerometer/Magnetometer

User interface

  • New WebSocket QMP monitor for UI commands
  • Button commands
  • LED update events
  • HTML/Javascript frontend that connects to WebSocket UI monitor
Retrieved from "https://wiki.qemu.org/index.php?title=Features/MicroBit&oldid=7750"