Features/MicroBit: Difference between revisions

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|[PATCH 0/2] nvic: Handle ARMv6-M SCS reserved registers
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|[http://patchew.org/QEMU/20180704195812.28798-1-jusual@mail.ru/ 20180704195812.28798-1-jusual@mail.ru]
|[http://patchew.org/QEMU/20180704195812.28798-1-jusual@mail.ru/ 20180704195812.28798-1-jusual@mail.ru]
| not merged
| superseded
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|[PATCH] target/arm: Forbid unprivileged mode for M Baseline
|<s>[PATCH] target/arm: Forbid unprivileged mode for M Baseline</s>
|[http://patchew.org/QEMU/20180704203639.29553-1-jusual@mail.ru/ 20180704203639.29553-1-jusual@mail.ru]
|[http://patchew.org/QEMU/20180704203639.29553-1-jusual@mail.ru/ 20180704203639.29553-1-jusual@mail.ru]
| superseded
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|7/5/18
|<s>[PATCH v2 0/2] nvic: Handle ARMv6-M SCS reserved registers</s>
|[http://patchew.org/QEMU/20180705215052.8795-1-jusual@mail.ru/ 20180705215052.8795-1-jusual@mail.ru]
| superseded
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|7/5/18
|[PATCH v3 0/2] nvic: Handle ARMv6-M SCS reserved registers
|[http://patchew.org/QEMU/20180705222115.17013-1-jusual@mail.ru/ 20180705222115.17013-1-jusual@mail.ru]
| not merged
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|7/5/18
|[PATCH v2] target/arm: Forbid unprivileged mode for M Baseline
|[http://patchew.org/QEMU/20180705222622.17139-1-jusual@mail.ru/ 20180705222622.17139-1-jusual@mail.ru]
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Revision as of 09:34, 6 July 2018

The micro:bit is a small ARMv6-M board designed for learning about computers. It can be programmed in Python, Javascript, and C/C++.

Julia Suvorova and Steffen Görtz are implementing micro:bit support in QEMU as part of the Outreachy and Google Summer of Code internship program.

Details

Patches

Date Name Message ID Status
5/3/18 [PATCH 0/2] arm: Add nRF51 SoC and micro:bit machine 20180503090532.3113-1-joel@jms.id.au superseded
5/29/18 [RFC 0/3] nRF51 SoC: Add UART support 20180529220338.10879-1-jusual@mail.ru Not merged
6/2/18 [RFC 0/2] arm: add skeleton Cortex M0 CPU model 20180602141446.29982-1-stefanha@redhat.com superseded
6/3/18 [RFC v3] qapi: command category to stimulate high-level machine devices 20180603203412.11033-1-contrib@steffen-goertz.de not merged
6/10/18 [RFC] target/arm: add ARMv6-M UNDEFINED 32-bit instruction test 20180610153556.17107-1-stefanha@redhat.com superseded
6/12/18 [PATCH] target/arm: Allow ARMv6-M Thumb2 instructions 20180612204632.28780-1-jusual@mail.ru merged
6/14/18 [RFC v2] target/arm: add ARMv6-M UNDEFINED 32-bit instruction test 20180614081610.12092-1-stefanha@redhat.com not merged
6/18/18 [PATCH] target/arm: Minor cleanup for ARMv6-M 32-bit instructions 20180618214604.6777-1-jusual@mail.ru merged
6/19/18 [RFC] Add NRF51 RNG peripheral 20180619105451.29163-1-contrib@steffen-goertz.de superseded
6/19/18 [PATCH] target/arm: Set strict alignment for ARMv6-M load/store 20180619204237.9931-1-jusual@mail.ru superseded
6/22/18 [PATCH v2 0/2] Strict alignment for ARMv6-M and ARMv8-M Baseline 20180622080138.17702-1-jusual@mail.ru merged
6/26/18 [RFC v2] arm: Add NRF51 SOC non-volatile memory controller 20180626093204.27612-1-contrib@steffen-goertz.de not merged
6/26/18 [RFC] arm: Add NRF51 SOC non-volatile memory controller 20180626081743.22097-1-contrib@steffen-goertz.de superseded
6/26/18 [RFC v2] arm: Add NRF51 random number generator peripheral 20180626104943.2756-1-contrib@steffen-goertz.de not merged
6/27/18 [PATCH v2 0/3] arm: Add nRF51 SoC and micro:bit machine 20180627143815.1829-1-joel@jms.id.au not merged
6/27/18 [RFC 0/8] arm: Changes to Microbit Board and NRF51 SOC 20180627073351.856-1-contrib@steffen-goertz.de not merged
6/30/18 [PATCH v2 0/3] arm: add skeleton Cortex M0 CPU model 20180630091343.14391-1-stefanha@redhat.com not merged
7/2/18 [PATCH] qtest: Use cpu address space instead of system memory 20180702065237.27899-1-jusual@mail.ru queued
7/4/18 [PATCH 0/2] nvic: Handle ARMv6-M SCS reserved registers 20180704195812.28798-1-jusual@mail.ru superseded
7/4/18 [PATCH] target/arm: Forbid unprivileged mode for M Baseline 20180704203639.29553-1-jusual@mail.ru superseded
7/5/18 [PATCH v2 0/2] nvic: Handle ARMv6-M SCS reserved registers 20180705215052.8795-1-jusual@mail.ru superseded
7/5/18 [PATCH v3 0/2] nvic: Handle ARMv6-M SCS reserved registers 20180705222115.17013-1-jusual@mail.ru not merged
7/5/18 [PATCH v2] target/arm: Forbid unprivileged mode for M Baseline 20180705222622.17139-1-jusual@mail.ru not merged

Patches not contributed by the gang, but necessary for the microbit tree:

Date Name Message ID Status
5/16/18 [PATCH v9 0/2] Implement Hex file loader and add test case 1526452467-18798-1-git-send-email-suhang16@mails.ucas.ac.cn merged
6/1/18 [PATCH 0/2] armv7m: Remove armv7m_init() function 20180601144328.23817-1-peter.maydell@linaro.org merged

Devices

nRF51 System-on-Chip

  • Cortex M0 (ARMv6-M) CPU
    • SysTick timer
    • NVIC irq controller
  • UART [Julia]
  • Watchdog
  • Clock controller [Julia]
  • Timers
  • RTC
  • RNG [Steffen]
  • TWI (i2c)
  • SPI
  • ADC
  • Quadrature decoder
  • Radio
  • GPIO [Steffen]
  • NVMC [Julia, Steffen]

Peripherals

  • A & B Buttons [Steffen]
  • 5x5 LEDs
  • i2c Accelerometer/Magnetometer

User interface

  • New WebSocket QMP monitor for UI commands
  • Button commands
  • LED update events
  • HTML/Javascript frontend that connects to WebSocket UI monitor