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Introduce PCI APIs for devices to use to access CPU memory and register IO regions in a more formal way.


Detailed Summary

Hardware is very hierarchical by design. PCI devices only ever communicate via the PCI bus. Likewise, SCSI devices only ever communicate via the SCSI bus which in term is implemented usually as a PCI device. In qemu today, we do not model this type of hierarchical access within the devices themselves. Correctly modeling this interaction is necessary to properly support advanced features like PCI IOMMUs and also to support PCI-based endian conversion in a more robust way.

We need to make the following changes to PCI devices:

  • Introduce a new API for reading/writing memory within a PCI device
  • Introduce a new API for mapping memory within a PCI device
  • Change the API for IO region registration to replace the map function with IO dispatch functions. The PCI layer should be responsible for mapping the IO regions, not the devices.


Most PCI devices are converted with the exception of VGA devices and virtio. virtio uses different memory access functions to manipulate the ring. RamAPI would simplify the implementation by allowing the virtio rings to be mapped permanently eliminating these special access functions.

The current patches also change the logic of dispatch functions to use a single callback that's passed the IO size verses using multiple callbacks. There is some resistance to this so it should be split into a separate series.