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ARM SMMU Support for Jailhouse Hypervisor

Summary: Implement basic SMMU support for ARM in the Jailhouse hypervisor

The Jailhouse hypervisor already supports IOMMUs for x86 targets but lacks a corresponding feature for ARM. Specifically modern ARM64 targets like the Xilinx Zynq UltraScale+ MPSoC come with ARM SMMU-based IOMMU support, and Jailhouse already suppors exactly that target. Even better, there is an emulation of that target available in QEMU. So the task is to develop the ARM-specific parts in Jailhouse to IOMMU support and fill them with SMMU driver code that runs on the QEMU model (real hardware would be available for occasional remote tests).

The task requires building up a test environment using the QEMU machine model of the Zynq MPSoC, reading the related hardware specifications, and then designing and implementing the extension to Jailhouse. While the target hardware is the (virtual) Zynq MPSoC, the design should allow later extensions to other SMMU-compatible targets like the AMD Opteron 1100.



  • Skill level: advanced
  • Language: C
  • Mentor: Jan Kiszka <>