Features/Xtensa: Difference between revisions

Revision as of 23:30, 17 March 2018

Summary

Add emulation of the Tensilica Xtensa processor family.

Owner

Name: Max Filippov / Open Source and Linux Lab
Email: jcmvbkbc@gmail.com

Status

Target can run linux on sim and xtfpga (lx60/lx200/ml605/kc705) boards with dc232b/dc233c/fsf/custom cpus in system and linux-user emulation modes. Kernel may be loaded with -kernel option, or by u-boot from FLASH or from TFTP, rootfs may be in a filesystem image file for the sim board, or may be mounted via NFS for the xtfpga.

Support for new cpu cores may be added automatically by reusing architecture variant overlay, but only core ISA instructions are supported.

TODO

implement ISA extensions like FLIX, wide branches or SIMD;
implement interrupt distribution hardware for SMP configurations;
implement remaining hardware for xtfpga boards (LEDs, DIP switches, LCD?, audio codec?);

Development

Current development status, useful links and related repos may be found there: http://wiki.osll.ru/doku.php?id=etc:users:jcmvbkbc:qemu-target-xtensa

Linux/xtensa page about Xtensa on QEMU.

@@ Line 10: / Line 10: @@
 == Status ==
-Target can run linux on sim and xtfpga (lx60/lx200/ml605/kc705) boards with dc232b/dc233c/fsf/custom cpus in system emulation mode. Kernel may be loaded with -kernel option, or by u-boot from FLASH or from TFTP, rootfs may be in a filesystem image file for the sim board, or may be mounted via NFS for the xtfpga.
+Target can run linux on sim and xtfpga (lx60/lx200/ml605/kc705) boards with dc232b/dc233c/fsf/custom cpus in system and linux-user emulation modes. Kernel may be loaded with -kernel option, or by u-boot from FLASH or from TFTP, rootfs may be in a filesystem image file for the sim board, or may be mounted via NFS for the xtfpga.
-Target configured with custom cpu can run ThreadX RTOS.
+Support for new cpu cores may be added automatically by reusing architecture variant overlay, but only core ISA instructions are supported.
-Support for new cpu cores may be added with minimal amount of hand-written code by reusing architecture variant overlay.
 == TODO ==
-* implement remaining hardware for xtfpga boards (LEDs, DIP switches, LCD?, audio codec?);
-* implement remaining core ISA options: cache;
-* implement cycle-accurate simulation mode;
 * implement ISA extensions like FLIX, wide branches or SIMD;
 * implement interrupt distribution hardware for SMP configurations;
-* implement user emulation mode;
+* implement remaining hardware for xtfpga boards (LEDs, DIP switches, LCD?, audio codec?);
 == Development ==
-Current development status, useful links and related repos may be found there: http://osll.ru/doku.php?id=etc:users:jcmvbkbc:qemu-target-xtensa
+Current development status, useful links and related repos may be found there: http://wiki.osll.ru/doku.php?id=etc:users:jcmvbkbc:qemu-target-xtensa
 Linux/xtensa page about [http://wiki.linux-xtensa.org/index.php/Xtensa_on_QEMU Xtensa on QEMU].
 [[Category:Completed feature pages]]