Planning/1.6: Difference between revisions
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* Some MIPS machines are suffering from more strict unassigned memory access handling. | * Some MIPS machines are suffering from more strict unassigned memory access handling. | ||
* GDB 'g' packets may contain more registers than expected for arm, m68k and ppc guests. | |||
== Targeted Features == | == Targeted Features == | ||
See the [[ChangeLog/1.6]] for full details. | See the [[ChangeLog/1.6]] for full details. | ||
Revision as of 17:44, 12 August 2013
This release will span a single quarter (3 months). We will have a 2.5 week freeze of the master branch. During this time, only bug fixes will be committed.
Release Schedule
| 2013-05-20 | Beginning of 1.6 development phase |
| 2013-06-15 | Mid-point of development cycle |
| 2013-07-15 | Soft feature freeze. Major features should have initial code committed by this date. |
| 2013-07-29 | Hard feature freeze. Tag v1.6.0-rc0, only bug fixes committed after this point |
| 2013-08-01 | Tag v1.6.0-rc1 |
| 2013-08-07 | Tag v1.6.0-rc2 |
| 2013-08-12 | Tag v1.6.0-rc3 |
| 2013-08-15 | Tag v1.6.0 |
Known issues
- Some MIPS machines are suffering from more strict unassigned memory access handling.
- GDB 'g' packets may contain more registers than expected for arm, m68k and ppc guests.
Targeted Features
See the ChangeLog/1.6 for full details.