Features/Xtensa

Summary

Add emulation of the Tensilica Xtensa processor family.

Owner

Name: Max Filippov / Open Source and Linux Lab
Email: jcmvbkbc@gmail.com

Status

Target can run linux on sim and lx60 boards with dc232b cpu in system emulation mode. Kernel may be loaded with -kernel option, or by u-boot from TFTP, rootfs may be in a filesystem image file for the sim board, or may be mounted via NFS for the lx60.

Target configured with custom cpu can run ThreadX RTOS.

Support for new cpu cores may be added with minimal amount of hand-written code by reusing architecture variant overlay.

TODO

implement remaining hardware for the lx60 board (LEDs, DIP switches, LCD?, audio codec?);
implement remaining core ISA options: coprocessors, floating point and cache;
implement cycle-accurate simulation mode;
implement ISA extensions like FLIX, wide branches or SIMD;
implement interrupt distribution hardware for SMP configurations;
implement user emulation mode;

Development

Current development status, useful links and related repos may be found there: http://wiki.osll.spb.ru/doku.php?id=etc:users:jcmvbkbc:qemu-target-xtensa

Linux/xtensa page about Xtensa on QEMU.